1 'n/***************************************************************************
2 * Copyright (C) 2007-2010 by Øyvind Harboe *
4 * This program is free software; you can redistribute it and/or modify *
5 * it under the terms of the GNU General Public License as published by *
6 * the Free Software Foundation; either version 2 of the License, or *
7 * (at your option) any later version. *
9 * This program is distributed in the hope that it will be useful, *
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
12 * GNU General Public License for more details. *
14 * You should have received a copy of the GNU General Public License *
15 * along with this program; if not, write to the *
16 * Free Software Foundation, Inc., *
17 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
18 ***************************************************************************/
20 /* This file supports the zy1000 debugger: http://www.zylin.com/zy1000.html
22 * The zy1000 is a standalone debugger that has a web interface and
23 * requires no drivers on the developer host as all communication
24 * is via TCP/IP. The zy1000 gets it performance(~400-700kBytes/s
25 * DCC downloads @ 16MHz target) as it has an FPGA to hardware
26 * accelerate the JTAG commands, while offering *very* low latency
27 * between OpenOCD and the FPGA registers.
29 * The disadvantage of the zy1000 is that it has a feeble CPU compared to
30 * a PC(ca. 50-500 DMIPS depending on how one counts it), whereas a PC
31 * is on the order of 10000 DMIPS(i.e. at a factor of 20-200).
33 * The zy1000 revc hardware is using an Altera Nios CPU, whereas the
34 * revb is using ARM7 + Xilinx.
36 * See Zylin web pages or contact Zylin for more information.
38 * The reason this code is in OpenOCD rather than OpenOCD linked with the
39 * ZY1000 code is that OpenOCD is the long road towards getting
40 * libopenocd into place. libopenocd will support both low performance,
41 * low latency systems(embedded) and high performance high latency
48 #include <target/embeddedice.h>
49 #include <jtag/minidriver.h>
50 #include <jtag/interface.h>
52 #include <helper/time_support.h>
54 #include <netinet/tcp.h>
57 #include "zy1000_version.h"
59 #include <cyg/hal/hal_io.h> // low level i/o
60 #include <cyg/hal/hal_diag.h>
62 #ifdef CYGPKG_HAL_NIOS2
63 #include <cyg/hal/io.h>
64 #include <cyg/firmwareutil/firmwareutil.h>
67 #define ZYLIN_VERSION GIT_ZY1000_VERSION
68 #define ZYLIN_DATE __DATE__
69 #define ZYLIN_TIME __TIME__
70 #define ZYLIN_OPENOCD GIT_OPENOCD_VERSION
71 #define ZYLIN_OPENOCD_VERSION "ZY1000 " ZYLIN_VERSION " " ZYLIN_DATE
76 /* The software needs to check if it's in RCLK mode or not */
77 static bool zy1000_rclk = false;
79 static int zy1000_khz(int khz, int *jtag_speed)
88 /* Round speed up to nearest divisor.
91 * (64000 + 15999) / 16000 = 4
98 * (64000 + 15998) / 15999 = 5
105 speed = (64000 + (khz -1)) / khz;
106 speed = (speed + 1 ) / 2;
110 /* maximum dividend */
118 static int zy1000_speed_div(int speed, int *khz)
132 static bool readPowerDropout(void)
135 // sample and clear power dropout
136 ZY1000_POKE(ZY1000_JTAG_BASE + 0x10, 0x80);
137 ZY1000_PEEK(ZY1000_JTAG_BASE + 0x10, state);
139 powerDropout = (state & 0x80) != 0;
144 static bool readSRST(void)
147 // sample and clear SRST sensing
148 ZY1000_POKE(ZY1000_JTAG_BASE + 0x10, 0x00000040);
149 ZY1000_PEEK(ZY1000_JTAG_BASE + 0x10, state);
151 srstAsserted = (state & 0x40) != 0;
155 static int zy1000_srst_asserted(int *srst_asserted)
157 *srst_asserted = readSRST();
161 static int zy1000_power_dropout(int *dropout)
163 *dropout = readPowerDropout();
167 void zy1000_reset(int trst, int srst)
169 LOG_DEBUG("zy1000 trst=%d, srst=%d", trst, srst);
171 /* flush the JTAG FIFO. Not flushing the queue before messing with
172 * reset has such interesting bugs as causing hard to reproduce
173 * RCLK bugs as RCLK will stop responding when TRST is asserted
179 ZY1000_POKE(ZY1000_JTAG_BASE + 0x14, 0x00000001);
183 /* Danger!!! if clk != 0 when in
184 * idle in TAP_IDLE, reset halt on str912 will fail.
186 ZY1000_POKE(ZY1000_JTAG_BASE + 0x10, 0x00000001);
191 ZY1000_POKE(ZY1000_JTAG_BASE + 0x14, 0x00000002);
196 ZY1000_POKE(ZY1000_JTAG_BASE + 0x10, 0x00000002);
199 if (trst||(srst && (jtag_get_reset_config() & RESET_SRST_PULLS_TRST)))
201 /* we're now in the RESET state until trst is deasserted */
202 ZY1000_POKE(ZY1000_JTAG_BASE + 0x20, TAP_RESET);
205 /* We'll get RCLK failure when we assert TRST, so clear any false positives here */
206 ZY1000_POKE(ZY1000_JTAG_BASE + 0x14, 0x400);
209 /* wait for srst to float back up */
210 if ((!srst && ((jtag_get_reset_config() & RESET_TRST_PULLS_SRST) == 0))||
211 (!srst && !trst && (jtag_get_reset_config() & RESET_TRST_PULLS_SRST)))
218 // We don't want to sense our own reset, so we clear here.
219 // There is of course a timing hole where we could loose
225 LOG_USER("SRST took %dms to deassert", (int)total);
233 start = timeval_ms();
236 total = timeval_ms() - start;
242 LOG_ERROR("SRST took too long to deassert: %dms", (int)total);
250 int zy1000_speed(int speed)
252 /* flush JTAG master FIFO before setting speed */
260 ZY1000_POKE(ZY1000_JTAG_BASE + 0x10, 0x100);
262 LOG_DEBUG("jtag_speed using RCLK");
266 if (speed > 8190 || speed < 2)
268 LOG_USER("valid ZY1000 jtag_speed=[8190,2]. Divisor is 64MHz / even values between 8190-2, i.e. min 7814Hz, max 32MHz");
269 return ERROR_INVALID_ARGUMENTS;
274 zy1000_speed_div(speed, &khz);
275 LOG_USER("jtag_speed %d => JTAG clk=%d kHz", speed, khz);
276 ZY1000_POKE(ZY1000_JTAG_BASE + 0x14, 0x100);
277 ZY1000_POKE(ZY1000_JTAG_BASE + 0x1c, speed);
282 static bool savePower;
285 static void setPower(bool power)
290 ZY1000_POKE(ZY1000_JTAG_BASE + 0x14, 0x8);
293 ZY1000_POKE(ZY1000_JTAG_BASE + 0x10, 0x8);
297 COMMAND_HANDLER(handle_power_command)
303 COMMAND_PARSE_ON_OFF(CMD_ARGV[0], enable);
308 LOG_INFO("Target power %s", savePower ? "on" : "off");
311 return ERROR_INVALID_ARGUMENTS;
318 static char *tcp_server = "notspecified";
319 static int jim_zy1000_server(Jim_Interp *interp, int argc, Jim_Obj *const *argv)
324 tcp_server = strdup(Jim_GetString(argv[1], NULL));
331 /* Give TELNET a way to find out what version this is */
332 static int jim_zy1000_version(Jim_Interp *interp, int argc, Jim_Obj *const *argv)
334 if ((argc < 1) || (argc > 3))
336 const char *version_str = NULL;
340 version_str = ZYLIN_OPENOCD_VERSION;
343 const char *str = Jim_GetString(argv[1], NULL);
344 const char *str2 = NULL;
346 str2 = Jim_GetString(argv[2], NULL);
347 if (strcmp("openocd", str) == 0)
349 version_str = ZYLIN_OPENOCD;
351 else if (strcmp("zy1000", str) == 0)
353 version_str = ZYLIN_VERSION;
355 else if (strcmp("date", str) == 0)
357 version_str = ZYLIN_DATE;
359 else if (strcmp("time", str) == 0)
361 version_str = ZYLIN_TIME;
363 else if (strcmp("pcb", str) == 0)
365 #ifdef CYGPKG_HAL_NIOS2
371 #ifdef CYGPKG_HAL_NIOS2
372 else if (strcmp("fpga", str) == 0)
375 /* return a list of 32 bit integers to describe the expected
378 static char *fpga_id = "0x12345678 0x12345678 0x12345678 0x12345678";
379 uint32_t id, timestamp;
380 HAL_READ_UINT32(SYSID_BASE, id);
381 HAL_READ_UINT32(SYSID_BASE+4, timestamp);
382 sprintf(fpga_id, "0x%08x 0x%08x 0x%08x 0x%08x", id, timestamp, SYSID_ID, SYSID_TIMESTAMP);
383 version_str = fpga_id;
384 if ((argc>2) && (strcmp("time", str2) == 0))
386 time_t last_mod = timestamp;
387 char * t = ctime (&last_mod) ;
400 Jim_SetResult(interp, Jim_NewStringObj(interp, version_str, -1));
406 #ifdef CYGPKG_HAL_NIOS2
412 struct cyg_upgrade_info *upgraded_file;
415 static void report_info(void *data, const char * format, va_list args)
417 char *s = alloc_vprintf(format, args);
422 struct cyg_upgrade_info firmware_info =
424 (uint8_t *)0x84000000,
430 "ZylinNiosFirmware\n",
434 static int jim_zy1000_writefirmware(Jim_Interp *interp, int argc, Jim_Obj *const *argv)
440 const char *str = Jim_GetString(argv[1], &length);
444 if ((tmpFile = open(firmware_info.file, O_RDWR | O_CREAT | O_TRUNC)) <= 0)
449 success = write(tmpFile, str, length) == length;
454 if (!cyg_firmware_upgrade(NULL, firmware_info))
462 zylinjtag_Jim_Command_powerstatus(Jim_Interp *interp,
464 Jim_Obj * const *argv)
468 Jim_WrongNumArgs(interp, 1, argv, "powerstatus");
472 bool dropout = readPowerDropout();
474 Jim_SetResult(interp, Jim_NewIntObj(interp, dropout));
481 int zy1000_quit(void)
489 int interface_jtag_execute_queue(void)
495 /* We must make sure to write data read back to memory location before we return
498 zy1000_flush_readqueue();
500 /* and handle any callbacks... */
501 zy1000_flush_callbackqueue();
505 /* Only check for errors when using RCLK to speed up
508 ZY1000_PEEK(ZY1000_JTAG_BASE + 0x10, empty);
509 /* clear JTAG error register */
510 ZY1000_POKE(ZY1000_JTAG_BASE + 0x14, 0x400);
512 if ((empty&0x400) != 0)
514 LOG_WARNING("RCLK timeout");
515 /* the error is informative only as we don't want to break the firmware if there
516 * is a false positive.
518 // return ERROR_FAIL;
527 static void writeShiftValue(uint8_t *data, int bits);
529 // here we shuffle N bits out/in
530 static __inline void scanBits(const uint8_t *out_value, uint8_t *in_value, int num_bits, bool pause_now, tap_state_t shiftState, tap_state_t end_state)
532 tap_state_t pause_state = shiftState;
533 for (int j = 0; j < num_bits; j += 32)
535 int k = num_bits - j;
539 /* we have more to shift out */
540 } else if (pause_now)
542 /* this was the last to shift out this time */
543 pause_state = end_state;
546 // we have (num_bits + 7)/8 bytes of bits to toggle out.
547 // bits are pushed out LSB to MSB
550 if (out_value != NULL)
552 for (int l = 0; l < k; l += 8)
554 value|=out_value[(j + l)/8]<<l;
557 /* mask away unused bits for easier debugging */
560 value&=~(((uint32_t)0xffffffff) << k);
563 /* Shifting by >= 32 is not defined by the C standard
564 * and will in fact shift by &0x1f bits on nios */
567 shiftValueInner(shiftState, pause_state, k, value);
569 if (in_value != NULL)
571 writeShiftValue(in_value + (j/8), k);
576 static __inline void scanFields(int num_fields, const struct scan_field *fields, tap_state_t shiftState, tap_state_t end_state)
578 for (int i = 0; i < num_fields; i++)
580 scanBits(fields[i].out_value,
589 int interface_jtag_add_ir_scan(struct jtag_tap *active, const struct scan_field *fields, tap_state_t state)
592 struct jtag_tap *tap, *nextTap;
593 tap_state_t pause_state = TAP_IRSHIFT;
595 for (tap = jtag_tap_next_enabled(NULL); tap!= NULL; tap = nextTap)
597 nextTap = jtag_tap_next_enabled(tap);
602 scan_size = tap->ir_length;
604 /* search the list */
607 scanFields(1, fields, TAP_IRSHIFT, pause_state);
608 /* update device information */
609 buf_cpy(fields[0].out_value, tap->cur_instr, scan_size);
614 /* if a device isn't listed, set it to BYPASS */
615 assert(scan_size <= 32);
616 shiftValueInner(TAP_IRSHIFT, pause_state, scan_size, 0xffffffff);
629 int interface_jtag_add_plain_ir_scan(int num_bits, const uint8_t *out_bits, uint8_t *in_bits, tap_state_t state)
631 scanBits(out_bits, in_bits, num_bits, true, TAP_IRSHIFT, state);
635 int interface_jtag_add_dr_scan(struct jtag_tap *active, int num_fields, const struct scan_field *fields, tap_state_t state)
637 struct jtag_tap *tap, *nextTap;
638 tap_state_t pause_state = TAP_DRSHIFT;
639 for (tap = jtag_tap_next_enabled(NULL); tap!= NULL; tap = nextTap)
641 nextTap = jtag_tap_next_enabled(tap);
647 /* Find a range of fields to write to this tap */
650 assert(!tap->bypass);
652 scanFields(num_fields, fields, TAP_DRSHIFT, pause_state);
655 /* Shift out a 0 for disabled tap's */
657 shiftValueInner(TAP_DRSHIFT, pause_state, 1, 0);
663 int interface_jtag_add_plain_dr_scan(int num_bits, const uint8_t *out_bits, uint8_t *in_bits, tap_state_t state)
665 scanBits(out_bits, in_bits, num_bits, true, TAP_DRSHIFT, state);
669 int interface_jtag_add_tlr()
671 setCurrentState(TAP_RESET);
676 int interface_jtag_add_reset(int req_trst, int req_srst)
678 zy1000_reset(req_trst, req_srst);
682 static int zy1000_jtag_add_clocks(int num_cycles, tap_state_t state, tap_state_t clockstate)
684 /* num_cycles can be 0 */
685 setCurrentState(clockstate);
687 /* execute num_cycles, 32 at the time. */
689 for (i = 0; i < num_cycles; i += 32)
693 if (num_cycles-i < num)
697 shiftValueInner(clockstate, clockstate, num, 0);
701 /* finish in end_state */
702 setCurrentState(state);
704 tap_state_t t = TAP_IDLE;
705 /* test manual drive code on any target */
707 uint8_t tms_scan = tap_get_tms_path(t, state);
708 int tms_count = tap_get_tms_path_len(tap_get_state(), tap_get_end_state());
710 for (i = 0; i < tms_count; i++)
712 tms = (tms_scan >> i) & 1;
714 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, tms);
717 ZY1000_POKE(ZY1000_JTAG_BASE + 0x20, state);
723 int interface_jtag_add_runtest(int num_cycles, tap_state_t state)
725 return zy1000_jtag_add_clocks(num_cycles, state, TAP_IDLE);
728 int interface_jtag_add_clocks(int num_cycles)
730 return zy1000_jtag_add_clocks(num_cycles, cmd_queue_cur_state, cmd_queue_cur_state);
733 int interface_add_tms_seq(unsigned num_bits, const uint8_t *seq, enum tap_state state)
735 /*wait for the fifo to be empty*/
738 for (unsigned i = 0; i < num_bits; i++)
742 if (((seq[i/8] >> (i % 8)) & 1) == 0)
752 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, tms);
756 if (state != TAP_INVALID)
758 ZY1000_POKE(ZY1000_JTAG_BASE + 0x20, state);
761 /* this would be normal if we are switching to SWD mode */
766 int interface_jtag_add_pathmove(int num_states, const tap_state_t *path)
773 tap_state_t cur_state = cmd_queue_cur_state;
776 memset(seq, 0, sizeof(seq));
777 assert(num_states < (int)((sizeof(seq) * 8)));
781 if (tap_state_transition(cur_state, false) == path[state_count])
785 else if (tap_state_transition(cur_state, true) == path[state_count])
791 LOG_ERROR("BUG: %s -> %s isn't a valid TAP transition", tap_state_name(cur_state), tap_state_name(path[state_count]));
795 seq[state_count/8] = seq[state_count/8] | (tms << (state_count % 8));
797 cur_state = path[state_count];
802 return interface_add_tms_seq(state_count, seq, cur_state);
805 static void jtag_pre_post_bits(struct jtag_tap *tap, int *pre, int *post)
807 /* bypass bits before and after */
812 struct jtag_tap *cur_tap, *nextTap;
813 for (cur_tap = jtag_tap_next_enabled(NULL); cur_tap!= NULL; cur_tap = nextTap)
815 nextTap = jtag_tap_next_enabled(cur_tap);
835 static const int embeddedice_num_bits[] = {32, 6};
839 values[1] = (1 << 5) | reg_addr;
843 embeddedice_num_bits,
848 void embeddedice_write_dcc(struct jtag_tap *tap, int reg_addr, uint8_t *buffer, int little, int count)
852 for (i = 0; i < count; i++)
854 embeddedice_write_reg_inner(tap, reg_addr, fast_target_buffer_get_u32(buffer, little));
860 jtag_pre_post_bits(tap, &pre_bits, &post_bits);
862 if ((pre_bits > 32) || (post_bits + 6 > 32))
865 for (i = 0; i < count; i++)
867 embeddedice_write_reg_inner(tap, reg_addr, fast_target_buffer_get_u32(buffer, little));
873 for (i = 0; i < count; i++)
875 /* Fewer pokes means we get to use the FIFO more efficiently */
876 shiftValueInner(TAP_DRSHIFT, TAP_DRSHIFT, pre_bits, 0);
877 shiftValueInner(TAP_DRSHIFT, TAP_DRSHIFT, 32, fast_target_buffer_get_u32(buffer, little));
878 /* Danger! here we need to exit into the TAP_IDLE state to make
879 * DCC pick up this value.
881 shiftValueInner(TAP_DRSHIFT, TAP_IDLE, 6 + post_bits, (reg_addr | (1 << 5)));
890 int arm11_run_instr_data_to_core_noack_inner(struct jtag_tap * tap, uint32_t opcode, uint32_t * data, size_t count)
892 /* bypass bits before and after */
895 jtag_pre_post_bits(tap, &pre_bits, &post_bits);
898 if ((pre_bits > 32) || (post_bits > 32))
900 int arm11_run_instr_data_to_core_noack_inner_default(struct jtag_tap *, uint32_t, uint32_t *, size_t);
901 return arm11_run_instr_data_to_core_noack_inner_default(tap, opcode, data, count);
904 static const int bits[] = {32, 2};
905 uint32_t values[] = {0, 0};
907 /* FIX!!!!!! the target_write_memory() API started this nasty problem
908 * with unaligned uint32_t * pointers... */
909 const uint8_t *t = (const uint8_t *)data;
914 /* Danger! This code doesn't update cmd_queue_cur_state, so
915 * invoking jtag_add_pathmove() before jtag_add_dr_out() after
916 * this loop would fail!
918 shiftValueInner(TAP_DRSHIFT, TAP_DRSHIFT, pre_bits, 0);
926 shiftValueInner(TAP_DRSHIFT, TAP_DRSHIFT, 32, value);
928 shiftValueInner(TAP_DRSHIFT, TAP_DRPAUSE, post_bits, 0);
930 /* copy & paste from arm11_dbgtap.c */
931 //TAP_DREXIT2, TAP_DRUPDATE, TAP_IDLE, TAP_IDLE, TAP_IDLE, TAP_DRSELECT, TAP_DRCAPTURE, TAP_DRSHIFT
932 /* KLUDGE! we have to flush the fifo or the Nios CPU locks up.
933 * This is probably a bug in the Avalon bus(cross clocking bridge?)
934 * or in the jtag registers module.
937 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, 1);
938 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, 1);
939 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, 0);
940 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, 0);
941 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, 0);
942 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, 1);
943 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, 0);
944 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, 0);
945 /* we don't have to wait for the queue to empty here */
946 ZY1000_POKE(ZY1000_JTAG_BASE + 0x20, TAP_DRSHIFT);
949 static const tap_state_t arm11_MOVE_DRPAUSE_IDLE_DRPAUSE_with_delay[] =
951 TAP_DREXIT2, TAP_DRUPDATE, TAP_IDLE, TAP_IDLE, TAP_IDLE, TAP_DRSELECT, TAP_DRCAPTURE, TAP_DRSHIFT
955 values[0] |= (*t++<<8);
956 values[0] |= (*t++<<16);
957 values[0] |= (*t++<<24);
965 jtag_add_pathmove(ARRAY_SIZE(arm11_MOVE_DRPAUSE_IDLE_DRPAUSE_with_delay),
966 arm11_MOVE_DRPAUSE_IDLE_DRPAUSE_with_delay);
971 values[0] |= (*t++<<8);
972 values[0] |= (*t++<<16);
973 values[0] |= (*t++<<24);
975 /* This will happen on the last iteration updating cmd_queue_cur_state
976 * so we don't have to track it during the common code path
984 return jtag_execute_queue();
989 static const struct command_registration zy1000_commands[] = {
992 .handler = handle_power_command,
994 .help = "Turn power switch to target on/off. "
995 "With no arguments, prints status.",
996 .usage = "('on'|'off)",
1000 .name = "zy1000_version",
1001 .mode = COMMAND_ANY,
1002 .jim_handler = jim_zy1000_version,
1003 .help = "Print version info for zy1000.",
1004 .usage = "['openocd'|'zy1000'|'date'|'time'|'pcb'|'fpga']",
1008 .name = "zy1000_server",
1009 .mode = COMMAND_ANY,
1010 .jim_handler = jim_zy1000_server,
1011 .help = "Tcpip address for ZY1000 server.",
1016 .name = "powerstatus",
1017 .mode = COMMAND_ANY,
1018 .jim_handler = zylinjtag_Jim_Command_powerstatus,
1019 .help = "Returns power status of target",
1021 #ifdef CYGPKG_HAL_NIOS2
1023 .name = "updatezy1000firmware",
1024 .mode = COMMAND_ANY,
1025 .jim_handler = jim_zy1000_writefirmware,
1026 .help = "writes firmware to flash",
1027 /* .usage = "some_string", */
1030 COMMAND_REGISTRATION_DONE
1034 static int tcp_ip = -1;
1036 /* Write large packets if we can */
1037 static size_t out_pos;
1038 static uint8_t out_buffer[16384];
1039 static size_t in_pos;
1040 static size_t in_write;
1041 static uint8_t in_buffer[16384];
1043 static bool flush_writes(void)
1045 bool ok = (write(tcp_ip, out_buffer, out_pos) == (int)out_pos);
1050 static bool writeLong(uint32_t l)
1053 for (i = 0; i < 4; i++)
1055 uint8_t c = (l >> (i*8))&0xff;
1056 out_buffer[out_pos++] = c;
1057 if (out_pos >= sizeof(out_buffer))
1059 if (!flush_writes())
1068 static bool readLong(uint32_t *out_data)
1072 if (!flush_writes())
1080 for (i = 0; i < 4; i++)
1083 if (in_pos == in_write)
1087 t = read(tcp_ip, in_buffer, sizeof(in_buffer));
1092 in_write = (size_t) t;
1095 c = in_buffer[in_pos++];
1097 data |= (c << (i*8));
1105 ZY1000_CMD_POKE = 0x0,
1106 ZY1000_CMD_PEEK = 0x8,
1107 ZY1000_CMD_SLEEP = 0x1,
1108 ZY1000_CMD_WAITIDLE = 2
1112 #if !BUILD_ECOSBOARD
1114 #include <sys/socket.h> /* for socket(), connect(), send(), and recv() */
1115 #include <arpa/inet.h> /* for sockaddr_in and inet_addr() */
1117 /* We initialize this late since we need to know the server address
1120 static void tcpip_open(void)
1125 struct sockaddr_in echoServAddr; /* Echo server address */
1127 /* Create a reliable, stream socket using TCP */
1128 if ((tcp_ip = socket(PF_INET, SOCK_STREAM, IPPROTO_TCP)) < 0)
1130 fprintf(stderr, "Failed to connect to zy1000 server\n");
1134 /* Construct the server address structure */
1135 memset(&echoServAddr, 0, sizeof(echoServAddr)); /* Zero out structure */
1136 echoServAddr.sin_family = AF_INET; /* Internet address family */
1137 echoServAddr.sin_addr.s_addr = inet_addr(tcp_server); /* Server IP address */
1138 echoServAddr.sin_port = htons(7777); /* Server port */
1140 /* Establish the connection to the echo server */
1141 if (connect(tcp_ip, (struct sockaddr *) &echoServAddr, sizeof(echoServAddr)) < 0)
1143 fprintf(stderr, "Failed to connect to zy1000 server\n");
1148 setsockopt(tcp_ip, /* socket affected */
1149 IPPROTO_TCP, /* set option at TCP level */
1150 TCP_NODELAY, /* name of option */
1151 (char *)&flag, /* the cast is historical cruft */
1152 sizeof(int)); /* length of option value */
1158 void zy1000_tcpout(uint32_t address, uint32_t data)
1161 if (!writeLong((ZY1000_CMD_POKE << 24) | address)||
1164 fprintf(stderr, "Could not write to zy1000 server\n");
1169 /* By sending the wait to the server, we avoid a readback
1170 * of status. Radically improves performance for this operation
1171 * with long ping times.
1176 if (!writeLong((ZY1000_CMD_WAITIDLE << 24)))
1178 fprintf(stderr, "Could not write to zy1000 server\n");
1183 uint32_t zy1000_tcpin(uint32_t address)
1187 zy1000_flush_readqueue();
1190 if (!writeLong((ZY1000_CMD_PEEK << 24) | address)||
1193 fprintf(stderr, "Could not read from zy1000 server\n");
1199 int interface_jtag_add_sleep(uint32_t us)
1202 if (!writeLong((ZY1000_CMD_SLEEP << 24))||
1205 fprintf(stderr, "Could not read from zy1000 server\n");
1211 /* queue a readback */
1212 #define readqueue_size 16384
1217 } readqueue[readqueue_size];
1219 static int readqueue_pos = 0;
1221 /* flush the readqueue, this means reading any data that
1222 * we're expecting and store them into the final position
1224 void zy1000_flush_readqueue(void)
1226 if (readqueue_pos == 0)
1228 /* simply debugging by allowing easy breakpoints when there
1229 * is something to do. */
1234 for (i = 0; i < readqueue_pos; i++)
1237 if (!readLong(&value))
1239 fprintf(stderr, "Could not read from zy1000 server\n");
1243 uint8_t *in_value = readqueue[i].dest;
1244 int k = readqueue[i].bits;
1246 // we're shifting in data to MSB, shift data to be aligned for returning the value
1249 for (int l = 0; l < k; l += 8)
1251 in_value[l/8]=(value >> l)&0xff;
1257 /* By queuing the callback's we avoid flushing the
1258 read queue until jtag_execute_queue(). This can
1259 reduce latency dramatically for cases where
1260 callbacks are used extensively.
1262 #define callbackqueue_size 128
1263 static struct callbackentry
1265 jtag_callback_t callback;
1266 jtag_callback_data_t data0;
1267 jtag_callback_data_t data1;
1268 jtag_callback_data_t data2;
1269 jtag_callback_data_t data3;
1270 } callbackqueue[callbackqueue_size];
1272 static int callbackqueue_pos = 0;
1274 void zy1000_jtag_add_callback4(jtag_callback_t callback, jtag_callback_data_t data0, jtag_callback_data_t data1, jtag_callback_data_t data2, jtag_callback_data_t data3)
1276 if (callbackqueue_pos >= callbackqueue_size)
1278 zy1000_flush_callbackqueue();
1281 callbackqueue[callbackqueue_pos].callback = callback;
1282 callbackqueue[callbackqueue_pos].data0 = data0;
1283 callbackqueue[callbackqueue_pos].data1 = data1;
1284 callbackqueue[callbackqueue_pos].data2 = data2;
1285 callbackqueue[callbackqueue_pos].data3 = data3;
1286 callbackqueue_pos++;
1289 static int zy1000_jtag_convert_to_callback4(jtag_callback_data_t data0, jtag_callback_data_t data1, jtag_callback_data_t data2, jtag_callback_data_t data3)
1291 ((jtag_callback1_t)data1)(data0);
1295 void zy1000_jtag_add_callback(jtag_callback1_t callback, jtag_callback_data_t data0)
1297 zy1000_jtag_add_callback4(zy1000_jtag_convert_to_callback4, data0, (jtag_callback_data_t)callback, 0, 0);
1300 void zy1000_flush_callbackqueue(void)
1302 /* we have to flush the read queue so we have access to
1303 the data the callbacks will use
1305 zy1000_flush_readqueue();
1307 for (i = 0; i < callbackqueue_pos; i++)
1309 struct callbackentry *entry = &callbackqueue[i];
1310 jtag_set_error(entry->callback(entry->data0, entry->data1, entry->data2, entry->data3));
1312 callbackqueue_pos = 0;
1315 static void writeShiftValue(uint8_t *data, int bits)
1319 if (!writeLong((ZY1000_CMD_PEEK << 24) | (ZY1000_JTAG_BASE + 0xc)))
1321 fprintf(stderr, "Could not read from zy1000 server\n");
1325 if (readqueue_pos >= readqueue_size)
1327 zy1000_flush_readqueue();
1330 readqueue[readqueue_pos].dest = data;
1331 readqueue[readqueue_pos].bits = bits;
1337 static void writeShiftValue(uint8_t *data, int bits)
1341 ZY1000_PEEK(ZY1000_JTAG_BASE + 0xc, value);
1342 VERBOSE(LOG_INFO("getShiftValue %08x", value));
1344 // data in, LSB to MSB
1345 // we're shifting in data to MSB, shift data to be aligned for returning the value
1346 value >>= 32 - bits;
1348 for (int l = 0; l < bits; l += 8)
1350 data[l/8]=(value >> l)&0xff;
1357 static char tcpip_stack[2048];
1358 static cyg_thread tcpip_thread_object;
1359 static cyg_handle_t tcpip_thread_handle;
1361 static char watchdog_stack[2048];
1362 static cyg_thread watchdog_thread_object;
1363 static cyg_handle_t watchdog_thread_handle;
1365 /* Infinite loop peeking & poking */
1366 static void tcpipserver(void)
1371 if (!readLong(&address))
1373 enum ZY1000_CMD c = (address >> 24) & 0xff;
1374 address &= 0xffffff;
1377 case ZY1000_CMD_POKE:
1380 if (!readLong(&data))
1382 address &= ~0x80000000;
1383 ZY1000_POKE(address + ZY1000_JTAG_BASE, data);
1386 case ZY1000_CMD_PEEK:
1389 ZY1000_PEEK(address + ZY1000_JTAG_BASE, data);
1390 if (!writeLong(data))
1394 case ZY1000_CMD_SLEEP:
1397 if (!readLong(&data))
1402 case ZY1000_CMD_WAITIDLE:
1414 static void tcpip_server(cyg_addrword_t data)
1416 int so_reuseaddr_option = 1;
1419 if ((fd = socket(AF_INET, SOCK_STREAM, 0)) == -1)
1421 LOG_ERROR("error creating socket: %s", strerror(errno));
1425 setsockopt(fd, SOL_SOCKET, SO_REUSEADDR, (void*) &so_reuseaddr_option,
1428 struct sockaddr_in sin;
1429 unsigned int address_size;
1430 address_size = sizeof(sin);
1431 memset(&sin, 0, sizeof(sin));
1432 sin.sin_family = AF_INET;
1433 sin.sin_addr.s_addr = INADDR_ANY;
1434 sin.sin_port = htons(7777);
1436 if (bind(fd, (struct sockaddr *) &sin, sizeof(sin)) == -1)
1438 LOG_ERROR("couldn't bind to socket: %s", strerror(errno));
1442 if (listen(fd, 1) == -1)
1444 LOG_ERROR("couldn't listen on socket: %s", strerror(errno));
1451 tcp_ip = accept(fd, (struct sockaddr *) &sin, &address_size);
1458 setsockopt(tcp_ip, /* socket affected */
1459 IPPROTO_TCP, /* set option at TCP level */
1460 TCP_NODELAY, /* name of option */
1461 (char *)&flag, /* the cast is historical cruft */
1462 sizeof(int)); /* length of option value */
1464 bool save_poll = jtag_poll_get_enabled();
1466 /* polling will screw up the "connection" */
1467 jtag_poll_set_enabled(false);
1471 jtag_poll_set_enabled(save_poll);
1480 #ifdef WATCHDOG_BASE
1481 /* If we connect to port 8888 we must send a char every 10s or the board resets itself */
1482 static void watchdog_server(cyg_addrword_t data)
1484 int so_reuseaddr_option = 1;
1487 if ((fd = socket(AF_INET, SOCK_STREAM, 0)) == -1)
1489 LOG_ERROR("error creating socket: %s", strerror(errno));
1493 setsockopt(fd, SOL_SOCKET, SO_REUSEADDR, (void*) &so_reuseaddr_option,
1496 struct sockaddr_in sin;
1497 unsigned int address_size;
1498 address_size = sizeof(sin);
1499 memset(&sin, 0, sizeof(sin));
1500 sin.sin_family = AF_INET;
1501 sin.sin_addr.s_addr = INADDR_ANY;
1502 sin.sin_port = htons(8888);
1504 if (bind(fd, (struct sockaddr *) &sin, sizeof(sin)) == -1)
1506 LOG_ERROR("couldn't bind to socket: %s", strerror(errno));
1510 if (listen(fd, 1) == -1)
1512 LOG_ERROR("couldn't listen on socket: %s", strerror(errno));
1519 int watchdog_ip = accept(fd, (struct sockaddr *) &sin, &address_size);
1521 /* Start watchdog, must be reset every 10 seconds. */
1522 HAL_WRITE_UINT32(WATCHDOG_BASE + 4, 4);
1524 if (watchdog_ip < 0)
1526 LOG_ERROR("couldn't open watchdog socket: %s", strerror(errno));
1531 setsockopt(watchdog_ip, /* socket affected */
1532 IPPROTO_TCP, /* set option at TCP level */
1533 TCP_NODELAY, /* name of option */
1534 (char *)&flag, /* the cast is historical cruft */
1535 sizeof(int)); /* length of option value */
1541 if (read(watchdog_ip, &buf, 1) == 1)
1544 HAL_WRITE_UINT32(WATCHDOG_BASE + 8, 0x1234);
1545 /* Echo so we can telnet in and see that resetting works */
1546 write(watchdog_ip, &buf, 1);
1549 /* Stop tickling the watchdog, the CPU will reset in < 10 seconds
1562 int interface_jtag_add_sleep(uint32_t us)
1571 int zy1000_init(void)
1574 LOG_USER("%s", ZYLIN_OPENOCD_VERSION);
1577 ZY1000_POKE(ZY1000_JTAG_BASE + 0x10, 0x30); // Turn on LED1 & LED2
1579 setPower(true); // on by default
1582 /* deassert resets. Important to avoid infinite loop waiting for SRST to deassert */
1584 zy1000_speed(jtag_get_speed());
1588 cyg_thread_create(1, tcpip_server, (cyg_addrword_t) 0, "tcip/ip server",
1589 (void *) tcpip_stack, sizeof(tcpip_stack),
1590 &tcpip_thread_handle, &tcpip_thread_object);
1591 cyg_thread_resume(tcpip_thread_handle);
1592 #ifdef WATCHDOG_BASE
1593 cyg_thread_create(1, watchdog_server, (cyg_addrword_t) 0, "watchdog tcip/ip server",
1594 (void *) watchdog_stack, sizeof(watchdog_stack),
1595 &watchdog_thread_handle, &watchdog_thread_object);
1596 cyg_thread_resume(watchdog_thread_handle);
1605 struct jtag_interface zy1000_interface =
1608 .supported = DEBUG_CAP_TMS_SEQ,
1609 .execute_queue = NULL,
1610 .speed = zy1000_speed,
1611 .commands = zy1000_commands,
1612 .init = zy1000_init,
1613 .quit = zy1000_quit,
1615 .speed_div = zy1000_speed_div,
1616 .power_dropout = zy1000_power_dropout,
1617 .srst_asserted = zy1000_srst_asserted,