board scripts: Marvell PXA270M processor has a new TAPID: 0x89265013

the new Marvell PXA270M processor has a new TAPID: 0x89265013.
Attached you will find a patch for target/pxa270.cfg that will handle this.

I have also attached a board/colibri.cfg file to support the Colibri
PXA270 module by Toradex.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>

diff --git a/tcl/board/colibri.cfg b/tcl/board/colibri.cfg
new file mode 100644 (file)
index 0000000..7c1f1cb
--- /dev/null
+++ b/tcl/board/colibri.cfg
@@ -0,0 +1,13 @@
+# Toradex Colibri PXA270
+source [find target/pxa270.cfg]
+reset_config trst_and_srst srst_push_pull
+adapter_nsrst_assert_width 40
+
+# CS0 -- one bank of CFI flash, 32 MBytes
+# the bank is 32-bits wide, two 16-bit chips in parallel
+set _FLASHNAME $_CHIPNAME.flash
+flash bank $_FLASHNAME cfi 0x00000000 0x02000000 2 4 $_TARGETNAME
+
+
+
+

diff --git a/tcl/target/pxa270.cfg b/tcl/target/pxa270.cfg
index 7aaef8c..f5d2c85 100644 (file)
--- a/tcl/target/pxa270.cfg
+++ b/tcl/target/pxa270.cfg
@@ -27,6 +27,12 @@ if { [info exists CPUTAPID2 ] } {
    set _CPUTAPID2 0x79265013
 }
 
+if { [info exists CPUTAPID3 ] } {
+   set _CPUTAPID2 $CPUTAPID3
+} else {
+  # set useful default
+   set _CPUTAPID3 0x89265013
+}
 
 # set adapter_nsrst_delay to the delay introduced by your reset circuit
 # the rest of the needed delays are built into the openocd program
@@ -36,7 +42,7 @@ adapter_nsrst_delay 260
 jtag_ntrst_delay 250
 
 set _TARGETNAME $_CHIPNAME.cpu
-jtag newtap $_CHIPNAME cpu -irlen 7 -ircapture 0x1 -irmask 0x7f -expected-id $_CPUTAPID -expected-id $_CPUTAPID2
+jtag newtap $_CHIPNAME cpu -irlen 7 -ircapture 0x1 -irmask 0x7f -expected-id $_CPUTAPID -expected-id $_CPUTAPID2 -expected-id $_CPUTAPID3
 
 target create $_TARGETNAME xscale -endian $_ENDIAN -chain-position $_TARGETNAME -variant pxa27x
 # maps to PXA internal RAM. If you are using a PXA255